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1. WO2020228180 - ARRAY SUBSTRATE AND PREPARATION METHOD FOR ARRAY SUBSTRATE

Publication Number WO/2020/228180
Publication Date 19.11.2020
International Application No. PCT/CN2019/102976
International Filing Date 28.08.2019
IPC
H01L 29/786 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
78with field effect produced by an insulated gate
786Thin-film transistors
CPC
H01L 27/1214
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
1214comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
H01L 27/1222
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
1214comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
1222with a particular composition, shape or crystalline structure of the active layer
H01L 27/1259
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
1214comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
1259Multistep manufacturing methods
Applicants
  • TCL华星光电技术有限公司 TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD. [CN]/[CN]
Inventors
  • 罗传宝 LUO, Chuanbao
Agents
  • 深圳翼盛智成知识产权事务所(普通合伙) ESSEN PATENT&TRADEMARK AGENCY
Priority Data
201910398245.714.05.2019CN
Publication Language Chinese (ZH)
Filing Language Chinese (ZH)
Designated States
Title
(EN) ARRAY SUBSTRATE AND PREPARATION METHOD FOR ARRAY SUBSTRATE
(FR) SUBSTRAT MATRICIEL ET PROCÉDÉ DE PRÉPARATION DE SUBSTRAT MATRICIEL
(ZH) 阵列基板和阵列基板的制备方法
Abstract
(EN)
An array substrate and an array substrate preparation method. The array substrate comprises a thin film transistor, the thin film transistor comprising a gate electrode (20), an active layer (40), a gate insulation layer (30), a source electrode (50), and a drain electrode (60). The active layer (40) comprises, sequentially stacked, a first active layer (401) and a second active layer (402), the first active layer (401) and the second active layer (402) being of different materials, thus improving on-state electric current in the thin film transistor.
(FR)
La présente invention concerne un substrat matriciel et un procédé de préparation de substrat matriciel. Le substrat matriciel comprend un transistor à couches minces, le transistor à couches minces comprenant une électrode de grille (20), une couche active (40), une couche d'isolation de grille (30), une électrode de source (50) et une électrode de drain (60). La couche active (40) comprend une première couche active (401) et une seconde couche active (402) empilées séquentiellement. La première couche active (401) et la seconde couche active (402) sont constituées de matériaux différents, ce qui améliore le courant électrique à l'état passant dans le transistor à couches minces.
(ZH)
一种阵列基板和阵列基板制备方法,阵列基板包括薄膜晶体管,薄膜晶体管包括栅极(20)、有源层(40)、栅绝缘层(30)、源极(50)、以及漏极(60),有源层(40)包括层叠设置的第一有源层(401)和第二有源层(402),第一有源层(401)和第二有源层(402)材料不同,以提升薄膜晶体管的开态电流。
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