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1. WO2020180677 - ENHANCED DATA CLOCK OPERATIONS IN MEMORY

Publication Number WO/2020/180677
Publication Date 10.09.2020
International Application No. PCT/US2020/020374
International Filing Date 28.02.2020
IPC
G11C 7/10 2006.01
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
7Arrangements for writing information into, or reading information out from, a digital store
10Input/output data interface arrangements, e.g. I/O data control circuits, I/O data buffers
G06F 1/3237 2019.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
1Details not covered by groups G06F3/-G06F13/82
26Power supply means, e.g. regulation thereof
32Means for saving power
3203Power management, i.e. event-based initiation of a power-saving mode
3234Power saving characterised by the action undertaken
3237by disabling clock generation or distribution
G06F 1/3234 2019.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
1Details not covered by groups G06F3/-G06F13/82
26Power supply means, e.g. regulation thereof
32Means for saving power
3203Power management, i.e. event-based initiation of a power-saving mode
3234Power saving characterised by the action undertaken
CPC
G06F 1/3237
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
1Details not covered by groups G06F3/00G06F13/00 and G06F21/00
26Power supply means, e.g. regulation thereof
32Means for saving power
3203Power management, i.e. event-based initiation of power-saving mode
3234Power saving characterised by the action undertaken
3237by disabling clock generation or distribution
G06F 1/3275
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
1Details not covered by groups G06F3/00G06F13/00 and G06F21/00
26Power supply means, e.g. regulation thereof
32Means for saving power
3203Power management, i.e. event-based initiation of power-saving mode
3234Power saving characterised by the action undertaken
325Power saving in peripheral device
3275Power saving in memory, e.g. RAM, cache
G06F 12/0875
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
0875with dedicated cache, e.g. instruction or stack
G06F 2212/1028
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
2212Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
10Providing a specific technical effect
1028Power efficiency
G06F 2212/45
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
2212Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
45Caching of specific data in cache memory
G06F 3/0625
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
3Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
06Digital input from or digital output to record carriers, ; e.g. RAID, emulated record carriers, networked record carriers
0601Dedicated interfaces to storage systems
0602specifically adapted to achieve a particular effect
0625Power saving in storage systems
Applicants
  • QUALCOMM INCORPORATED [US]/[US]
Inventors
  • SUH, Jungwon
  • CHUN, Dexter Tamio
  • LO, Michael Hawjing
  • THOZIYOOR, Shyamkumar
  • KUMAR, Ravindra
Agents
  • TSAI, Terry
Priority Data
16/803,97727.02.2020US
62/812,68901.03.2019US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) ENHANCED DATA CLOCK OPERATIONS IN MEMORY
(FR) OPÉRATIONS D'HORLOGE DE DONNÉES EN MÉMOIRE
Abstract
(EN)
Methods and apparatuses for improve data clock to reduce power consumption are presented. The apparatus includes a memory configured to receive a data clock from a host via a link and to synchronize the data clock with the host. The memory includes a clock tree buffer configured to toggle based on the data clock to capture write data or to output read data and a command decoder configured to detect a data clock suspend command while the data clock is synchronized between the host and the memory. The clock tree buffer is configured to disable toggling based on the data clock in response to the command decoder detecting the data clock suspend command. the host includes a memory controller configured to provide a data clock suspend command to the memory via the link while the data clock is synchronized between the host and the memory.
(FR)
L'invention concerne des procédés et des appareils permettant d'améliorer l'horloge de données afin de réduire la consommation d'énergie. L'appareil comprend une mémoire configurée pour recevoir une horloge de données provenant d'un hôte par l'intermédiaire d'une liaison et pour synchroniser l'horloge de données avec l'hôte. La mémoire comprend un tampon d'arbre d'horloge configuré pour basculer sur la base de l'horloge de données afin de capturer des données d'écriture ou de délivrer en sortie des données de lecture et un décodeur d'instruction configuré pour détecter une instruction de suspension d'horloge de données tandis que l'horloge de données est synchronisée entre l'hôte et la mémoire. Le tampon d'arbre d'horloge est configuré pour désactiver un basculement sur la base de l'horloge de données en réponse au décodeur d'instruction détectant l'instruction de suspension d'horloge de données. L'hôte comprend un dispositif de commande de mémoire configuré pour fournir une instruction de suspension d'horloge de données à la mémoire par l'intermédiaire de la liaison tandis que l'horloge de données est synchronisée entre l'hôte et la mémoire.
Also published as
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